1. Technical Field
The present invention relates to a test apparatus and a test method.
2. Related Art
A test apparatus for testing a semiconductor device, for example, judges pass/fail of the device under test by measuring a signal output by the device under test in response to a test signal having a prescribed pattern. One known technique for judging pass/fail of the device under test involves using a Shmoo plot indicating the judgment results, i.e. pass or fail, of the test on a coordinate plane corresponding to the test parameters. Details of Shmoo plots are provided in Japanese Patent Application Publication No. 2006-003216, for example.
The test apparatus judges pass/fail of the device under test based on whether the output signal of the device under test matches an expected value. As a result, the test apparatus can classify a device under test according to the two ranks of pass and fail, but has difficulty classifying a device under test according to three or more ranks.